Intel Corporation in Santa Clara, California, is seeking a Design Verification Engineer to verify interconnect and chassis IPs across product families. You will develop verification plans, build reusable environments, and drive first-pass silicon success with strong DV practices.
The role requires hands-on verification development using SystemVerilog, C/C++, Python, and AI-assisted tooling. The position offers a hybrid work model with collaboration across architecture, design, and software teams.
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