Cadence Design Systems seeks a Design Verification Architect / Director to lead the Processor Verification team in San Jose, CA, and Austin, TX. You will verify microprocessor cores and peripherals, craft verification plans, and implement testbenches and coverage monitors for highly complex CPU designs.
The role requires 17+ years in design verification, strong leadership, and deep knowledge of SystemVerilog/UVM.
#J-18808-LjbffrCPU Verification Director – Core & Memory Architect in san jose at Unknown Company
This position is listed as full time and onsite.