Qualcomm Technologies, Inc. seeks a CPU Physical Design Timing Engineer to define, develop and drive timing closure for Oryon CPU Cores. You will work with RTL and timing teams to meet aggressive power, area and performance goals on advanced nodes.
You will build automation scripts (TCL/Perl/Python), run PrimeTime/Tempus, and contribute to timing methodology across multiple CPU projects, driving PPA improvements. Strong STA experience and RTL-to-GDS flow knowledge are essential.
#J-18808-LjbffrCPU Timing Closure Engineer for Oryon Cores in santa clara at Unknown Company
This position is listed as full time and onsite.