Qualcomm seeks a CPU Physical Design Timing Engineer to drive high-performance, low-power CPU implementations for next‑generation wireless and mobile SoCs. You will own timing closure for complex CPU blocks, performing constraint development, static timing analysis, ECO implementation, and sign‑off across multiple process corners. Partner closely with RTL, architecture, place‑and‑route, and PD teams to optimize performance, power, and area.
Use industry EDA tools and advanced nodes to solve challenging timing issues. Contribute to methodology improvements, automation, and best practices in a fast‑paced, collaborative engineering culture.
CPU Physical Design Timing Engineer in austin at Unknown Company
This position is listed as full time and onsite.