Amazon Web Services (AWS) seeks an ASIC Design Engineer to design, optimize, and implement high-performance RTL blocks for data-center accelerators. You will work on SystemVerilog RTL, timing and synthesis, and collaborate with architects, verification teams, and back-end experts in a fast-paced, inclusive environment.
The role is based in Cupertino, CA with potential relocation considerations. The ideal candidate has strong debugging skills, experience with verification at multiple levels, and
#J-18808-LjbffrCloud-Scale ML Acceleration ASIC Design Engineer in cupertino at Unknown Company
This position is listed as full time and onsite.