Chip Lead: Digital ASIC Design & Tape-Out Architect

Broadcom Inc. in San Jose, California, seeks a Lead ASIC Design Engineer to oversee the design and integration of complex silicon projects. The role requires deep expertise in SystemVerilog and managing cross-disciplinary teams to achieve design goals.

The ideal candidate will have over 12 years in ASIC/SoC design, a strong history of first-pass silicon tape-outs, and excellent communication skills. Additionally, Broadcom offers a competitive salary ranging from $143,800 to $230,000 and a comprehensive benefits package.