A leading technology company is seeking a Cellular ASIC Design Engineer to architect and implement protocol processing hardware for cutting-edge wireless SoCs. You will manage the complete lifecycle from architectural exploration to lab validation, collaborating closely with diverse teams. Preferably, candidates should have a strong background in SystemVerilog, low-power design, and a minimum of 10 years of industry experience. The position offers a competitive salary range and various benefits including medical coverage, stock purchase options, and educational reimbursement.
#J-18808-Ljbffr
#J-18808-Ljbffr