Unknown Company

ASIC Physical Design Engineer, Netlisting - New College Grad 2026

santa clara, ca • Posted 2 weeks ago
Onsite Full Time Physics

What you’ll be doing:

  • Drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with a focus on netlist-related aspects such as equivalence checking, asynchronous checking including clock domain crossing checks and MTBF analysis, logic synthesis, netlist quality checks, etc.
  • Help in ECO generation and implementation.

What we need to see:

  • Master’s or PhD degree in Electrical or Computer Engineering (or equivalent experience).
  • Shown knowledge in logic equivalence checking/Formal Verification required from RTL to tapeout with industry-standard tools.
  • Understanding of hardware architecture and hands‑on skills in RTL/logic design for timing closure.
  • Experience in clock-domain-crossing checking, MTBF analysis, either with EDA tools (i.e., Synopsys or Cadence) or in-house tools.
  • Background with logic synthesis at either block or full-chip level, at project execution and/or flow development.
  • In‑depth knowledge of industry standard EDA tools in related fields.
  • Experience in programming and scripting languages, such as Perl, TCL, Make, Python, etc.

Ways to stand out from the crowd:

  • Experience in logic synthesis and equivalence checking/FV. Familiarity with industry tools and flow.
  • Strong hands‑on debugging capability and problem‑solving skills.
  • Experience improving workflows and productivity through effective AI utilization is a plus.

Base salary will be determined based on location, experience, and the pay of employees in similar positions. The base salary range is $116,000 - $189,750 for Level 2, and $136,000 - $218,500 for Level 3.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until May 11, 2026 .

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. We highly value diversity in our current and future employees, and we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.

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ASIC Physical Design Engineer, Netlisting - New College Grad 2026 in santa clara at Unknown Company

This position is listed as full time and onsite.

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