SolGenie in Lafayette, Indiana, seeks a full-time ASIC Physical Design Engineer (TSMC / FinFET) to lead tapeouts and signoff. You will interface with customers and foundries, guide design sign-off, and collaborate with internal teams to ensure manufacturability and robust fabrication.
The role requires proven tape-out experience on advanced TSMC nodes, strong backend understanding, and excellent communication. Relocation assistance is provided for the right candidate.
#J-18808-LjbffrASIC Physical Design Engineer – FinFET, TSMC, Relocation in lafayette at Unknown Company
This position is listed as full time and onsite.