NVIDIA is seeking a Logic Design Engineer to join its CPU Logic Design Team in Santa Clara. You will own a unit on the chip, write high-performance RTL, and contribute to interconnect networks, caches, and timing closure.
The role requires a BS/MS in EE/CE/CS, experience in processor or high-performance designs, and a strong background in Verilog and ASIC design flow. Collaboration with verification and implementation teams is essential.
#J-18808-LjbffrASIC Logic Design Engineer - High-Performance CPU Cores in santa clara at Unknown Company
This position is listed as full time and onsite.