ASIC / FPGA Design Verification Engineer - (Associate or Experienced)

ASIC / FPGA Design Verification Engineer - (Associate or Experienced)Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design Verification Engineers to join us as part of our Boeing Electronic Products team at the heart of Boeing's products in El Segundo or Huntington Beach, CA.Develop adaptable verification engineers who build strong technical fundamentals, become independent owners of assigned scope, and grow from guided execution toward ownership of verification work of moderate complexity.Level IntentLearn department processes, communicate proactively, build independence, and manage assigned verification scope.Independently own verification scope of moderate complexity and support closure, integration, and traceability activities.Engineers support ASIC, FPGA, and SoC verification activities across advanced aerospace programs including space systems, satellite technologies, NASA mission support, aviation platforms, communications systems, and related digital subsystems while gaining exposure to broader digital product development activities.Candidates are expected to possess strong verification fundamentals including simulation concepts, debug methods, coverage approaches, requirements traceability awareness, and general digital verification methodology concepts.

Experience with UVM is strongly preferred, and engineers should be prepared to discuss verification fundamentals, SystemVerilog usage, coverage strategy, reusable verification concepts, and their current level of UVM understanding during interviews.Engineers are expected to communicate status, blockers, assumptions, risks, and learning needs proactively while developing increasing ownership.

The role emphasizes growth toward independent execution and effective management of personal scope of work.Teams combine engineers with complementary technical strengths. Engineers are encouraged to build deeper expertise in selected areas while collaborating across broader verification activities to support overall program goals.ResponsibilitiesExecute assigned verification tasks and progressively increase ownership.Develop simulation, debug, coverage, and requirements traceability skills.Contribute to SystemVerilog and UVM environments, tests, UVCs, and reusable infrastructure.Support integration investigations and system-level debug activities.Contribute to verification objectives, coverage assessments, and closure activities appropriate to experience level.Own verification scope of moderate complexity at Level III.This position is expected to be 100% onsite. The selected candidate will be required to work onsite at one of the listed locations.Basic Qualifications (Required Skills/Experience):Ability to obtain a US Security Clearance for which the US Government requires US Citizenship as a condition of employment. An interim and/or final U.S. Secret Clearance Post-Start is required.Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statementBachelor's degree with 2+ years of professional engineering experience in ASIC, FPGA, or SoC design verification, OR a Master's degree with related verification project/coursework experienceUnderstanding of digital verification fundamentalsExperience with SystemVerilog for simulation testbench development and RTL debuggingPreferred Qualifications (Desired Skills/Experience):5+ years of related engineering experienceBachelor's degree in EE, CE, or related field & 2+ years ASIC, FPGA, or SoC verification experienceActive U.S. Secret Security ClearanceUVM experience strongly preferredOOP experience strongly preferredCoverage-driven verification exposureRequirements traceability experienceReusable UVC development exposureSystem-level debug exposureStrong communication and technical presentation skills