ASIC Engineer Intern — SoC RTL & Verification

Annapurna Labs (U.S.) Inc. in Austin, TX is seeking an ASIC Engineer Intern to contribute to real chip development work. You will design RTL, verify functionality, and support synthesis and timing analysis on fast-moving teams.

You will be paired with a mentor to scope your project, grow your skills, and deliver meaningful impact by internship end. A structured program includes hands-on design and collaboration across architecture and verification teams.