ASIC Engineer Intern: RTL & SoC Design

Amazon in Cupertino, CA is offering an ASIC Engineer Intern role focused on RTL design for custom silicon. You will write RTL in Verilog/SystemVerilog, contribute to verification, and support synthesis and timing analysis while collaborating with cross-functional teams to bring features from spec to silicon.

You will be paired with a mentor and work on real chip development tasks, with a clear path to impact and growth during the internship, and exposure to industry-standard EDA tools.