ASIC Design Engineer

At SK Hynix Memory Solution, we’re at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting‑edge memory technologies are essential in today’s most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.

We’re looking for innovative minds to join our mission of shaping the future of technology. At SK Hynix Memory, you’ll be part of a team that’s pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We’re not just adapting to technological change – we’re driving it, with significant investments in artificial intelligence, machine learning, and eco‑friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what’s possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.

About The Role

You will join the System on Chip (SoC) Design Team at SK hynix memory solutions America, a group dedicated to delivering best-in-class controllers for high-performance SSDs. This team spans the full design cycle—from micro‑architecture and RTL design to timing closure and tapeout readiness—enabling next‑generation enterprise and AI data center storage solutions.

Responsibilities

• RTL design (Verilog/SystemVerilog) for IP based on existing module or new specifications.
• Collaborate, create clear documentation and communication with Design Verification, Silicon Validation, and Firmware teams to ensure design quality.

Minimum Qualifications

• Education: BS/MS/PhD program in Electrical Engineering, Computer Engineering, or related field.
• Proficiency in logic design and micro‑architecture; RTL coding in Verilog and/or SystemVerilog language.

Preferred Qualifications

• Advanced Education: Master’s or PhD in Electrical Engineering with working experiences.
• Experience or coursework in digital logic design, verification methodologies, and protocols (AMBA, PCIe, NAND, DDR)
• Scripting skills (Python, Perl, TCL) and Linux command-line experiences
• Strong problem‑solving and communication skills
• Proficiency in AI tool to generate synthesizable and functional RTL code

COMPENSATION: $110,000/yr - $170,000/yr

REGARDING COMPENSATION:

SK hynix memory solutions America Inc. offers you the opportunity to apply your skills to exciting projects while working with innovative teams. Our compensation package is complimented by a generous benefits package including medical, dental, vision, life insurance and a company 401(k) match, as well as cafeteria, onsite gym and much more. If you are motivated by technical challenges, we offer a collaborative work environment that encourages career growth.

The salary offered to a selected candidate will be tailored based on several factors, including the location, job grade, relevant knowledge, skills, and experience. We also take into account the internal equity among our current team members to ensure fairness and competitiveness.

This role requires you to work onsite 5 days a week at our San Jose location. Is that a requirement you can meet?

Are you legally authorized to work in the U.S. for any employer?

Will you now or in the future require sponsorship to work in the U.S.?

If you are not located in San Jose, CA are you willing to relocate?

Does the base compensation range outlined in the job description align with your salary expectations for your next role?

Are you a current or former employee of SK hynix memory solutions America?

Are you being referred to this role by a current employee of SK hynix memory solutions America?

As set forth in SK hynix memory solutions America Inc.’s Equal Employment Opportunity policy, we do not discriminate on the basis of any protected group status under any applicable law.

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