Meta is seeking ASIC Design Engineers to join its Infrastructure organization, focusing on the development of advanced ASICs for applications in machine learning, video transcoding, and network acceleration. You will work with cross-functional teams to ensure robust timing and power-aware designs.
The role requires a Bachelor's degree (or PhD) in a related field and a strong background in RTL/HDL design. Relocation and full-time commitment are typical for this position.
#J-18808-LjbffrASIC Design Engineer – RTL & Microarchitecture Expert in austin at Unknown Company
This position is listed as full time and onsite.