ASIC Design Engineer — RTL & Microarchitecture (Equity)

NVIDIA Gruppe in Santa Clara is hiring an ASIC Design Engineer to develop cutting-edge SoC and GPU products. You will work with a talented engineering team on projects ranging from consumer graphics to AI. The role involves drafting microarchitecture documents, implementing high-performance RTL, and collaborating with various teams.

Ideal candidates hold a BS/MS in electrical engineering, have at least 2 years of RTL design experience, and showcase strong skills in Verilog and coding languages. The position offers a competitive salary range of $116,000 – $189,750 for Level2 and $136,000 – $218,500 for Level3.