ASIC Design Engineer I – RTL & SoC Focus

Amazon's Annapurna Labs is seeking an ASIC Engineer I in Austin, TX to design RTL for machine learning accelerators and contribute to full chip development from RTL to silicon. You will work on Verilog/SystemVerilog, verification environments, and collaborate across architecture, verification, and physical design teams.

The role emphasizes hands-on ownership, learning by building, and impact on silicon used by millions of customers.