ASIC Clocks Verification Engineer — New Grad

NVIDIA is seeking an exceptional ASIC Clocks Verification Engineer to join its GPU clocks group in Santa Clara, CA. You will verify high‑frequency clock structures and collaborate with architects, ASIC designers, and verification engineers to meet architectural constraints.

You will use SystemVerilog/UVM, Python, and Perl across teams, delivering clock data to SOC verification, timing, and DFT groups while addressing sub‑micron design challenges and debugging GPU clock silicon issues.