Senior Asic & Fpga Design Engineer
You will be the Senior Asic & Fpga Design Engineer for the Programmable Logic Design team supporting the Next Generation Short Range Interceptor (Ngsri). Our team creates the digital heart beats-Asic and Fpga-that enable precision engagement aerospace and defense systems for the United States and allied forces.
What you will be doing as the Senior Asic & Fpga Design Engineer you will own the architecture, development, verification, and delivery of the Datalink Fpga that powers the Ngsri. You'll translate system level performance, safety, and reliability goals into robust, production ready logic while mentoring junior talent and collaborating across disciplines. Your responsibilities will include:
- Defining architecture and design specifications for programmable logic components; writing clean, well documented Rtl in Vhdl/Verilog/Systemverilog.
- Developing synthesis, place and route, and timing closure strategies to achieve deterministic operation on target Fpga families.
- Building comprehensive test plans, simulation models, and verification environments (Uvm, Systemc, Python based testbenches) to prove functional correctness and timing margins.
- Leading hardware in the loop (Hil) testing, board level debugging, and subsystem integration.
- Performing timing analysis, power budgeting, and resource utilization studies to guide device selection and optimize Fpga utilization.
- Managing configuration control with Gitlab (or equivalent), maintaining version controlled repositories, and ensuring full traceability of all artifacts.
- Producing complete design packages-specifications, test plans, verification reports, and release documentation-meeting aerospace standards and Lockheed Martin command media requirements.
- Collaborating with systems, software, mechanical, test, manufacturing, and quality teams to keep the program on schedule and within performance envelopes.
- Mentoring junior engineers, championing best practices in Fpga/Asic development, verification, and configuration management.
Why join us do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you. We offer flexible work schedules to comprehensive benefits investing in your future and security.
Further information about this opportunity: This position is in Orlando. Discover more about our Orlando, Florida location. Must be a U.S. citizen - this position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance.
Basic qualifications:
- Bachelor of science degree in electrical engineering or a closely related stem field from an accredited university; master's degree preferred
- Minimum 3 years of professional experience with Fpga design and simulation verification or a related discipline
- Proficiency in Hdl programming with Vhdl, Verilog, and/or SystemVerilog
- Experience with Xilinx/Amd toolsets (Vivado, Vitis, Vitis Hls) and UltraScale design methodology
- Experience with Fpga simulation tools such as Synopsys Vcs
- Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity
- Experience with high-speed interfaces such as Axi, Ethernet, Tcp/Ip, Pcie, and serial protocols
- Practical laboratory debug experience with high-speed oscilloscopes, spectrum analyzers, and signal generators
- Familiarity with Synopsys eda tools
- Must be a US citizen; must possess or be able to obtain a DoD secret clearance
Desired skills:
- Lm/Mfc design experience and missile program experience
- Experience with DSP, radios, and digital communications for datalink and telemetry uses on a small form factor
- Experienced on Xilinx Soc platforms and analog devices transceivers
- Capable of writing Verilog, Simulink for Hdl coder, and C/C++-
- Experience with Mathworks/ Hdl Coder
- Experience with digital communication system
- Strong communication, collaboration, and presentation abilities
- Active DoD secret or Top Secret clearance
Security clearance statement: This position requires a government security clearance, you must be a US citizen for consideration.
Clearance level: Secret
Other important information you should know:
- Expression of interest: By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match.
- Ability to work remotely: Part-time remote telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process.
- Work schedules: Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.
- Schedule for this position: 4x10 hour day, 3 days off per week
Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.