Micron Technology, Inc. in Boise, Idaho, seeks a Layout Designer to create physical layouts for DRAM and memory products, performing floorplanning, routing, and power design.
You will verify layouts against schematics and process rules and support IP layout standardization across global teams. The role requires a Master’s degree in Electrical or Computer Engineering and hands-on experience with Cadence OA, Caliber, and LVS/DRC verification tools.
#J-18808-LjbffrAnalog IC Layout Designer — IP/Floorplan Specialist in boise at Unknown Company
This position is listed as full time and onsite.