Teradyne's Semiconductor Test Division in Agoura Hills, CA is seeking an Analog Design Engineer to develop high-speed analog and mixed-signal ASICs for Automatic Test Equipment (ATE).
Candidates will design from spec to transistor-level, validate with Cadence tools, and collaborate across AI-enabled design teams to accelerate semiconductor innovation.
Strong background in CMOS, FinFET, and high-frequency IC design, plus scripting in Python or SKILL, is highly valued.
#J-18808-LjbffrAnalog Design Engineer - High‑Speed AI ICs in agoura hills at Unknown Company
This position is listed as full time and onsite.