Micron Technology, Inc. in Folsom, CA, is seeking an MTS AI-Optimized Memory Digital Design Engineer to translate architectural goals into silicon-proven RTL and memory-system blocks.
You will design, implement, and review SystemVerilog RTL for advanced memory architectures, perform synthesis and early PPA analysis, and collaborate across teams to optimize area, power, and timing for AI workloads.
#J-18808-LjbffrAI-Optimized Memory Digital Design Engineer (MTS) in folsom at Unknown Company
This position is listed as full time and onsite.