Tachyum is seeking a Physical Design Engineer to contribute to a high‑performance L2 cache unit for cutting‑edge AI processing elements. The role is based in Las Vegas or Sunnyvale, with on‑site collaboration across teams.
You will work on processor pipelines, cache coherency, and low‑power techniques using Verilog/SystemVerilog, synthesis, STA, and related tools. Candidates with 2–4 years of experience are welcome to apply.
#J-18808-Ljbffr