A leading AI research organization in Los Angeles is seeking a Design Verification Engineer to verify cutting-edge ML accelerators. You will be responsible for ensuring functional correctness in complex hardware systems, ranging from individual IP blocks to full SoC functionality. The ideal candidate has a BS/MS in EE/CE/CS, 3+ years of verification experience, and is proficient in SystemVerilog and UVM. This role offers an opportunity to contribute to advanced AI hardware development in a collaborative environment.
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