Intel Corporation in Santa Clara, CA, is seeking an Entry Level Design Verification Engineer to help verify interconnect and chassis IPs for next-generation SoC platforms. You will work with senior engineers, build testbenches, and develop constrained-random tests while ramping quickly.
You'll learn verification flows, write and debug tests, analyze failures, and contribute to coverage plans, with opportunities to apply AI-assisted development tools in daily tasks. On-site role.
#J-18808-LjbffrAI-Driven Design Verification Engineer - Entry Level in santa clara at Unknown Company
This position is listed as full time and onsite.