TenX Semi is seeking a Chip Design and Verification Methodology Engineer in the San Francisco Bay Area. You will develop innovative methodologies to design and verify chip designs, focusing on AI-generated RTL verification and maximal automation.
You will architect verification loops, establish reusable test environments, and build convergence monitoring, deep-dive debugging tools, and formal proof generation to ensure robust, trustworthy chip designs.
#J-18808-LjbffrAI-Driven Chip Verification Methodology Engineer in san francisco at Unknown Company
This position is listed as full time and onsite.